The present invention relates generally to accessing data in computer systems, and more specifically a system and method for accessing video and system data from a unified memory using an address translator.
FIG. 1 illustrates a prior art computer system utilizing an Accelerated Graphics Port (AGP) bus, which provides access to high speed video memory used to support video processing.
As illustrated in prior art FIG. 1, the computer system comprises a central processing unit (CPU), a memory controller, system memory, an AGP interface controller (AIC), and video memory.
In operation, the CPU will make a request for a memory resource either in the video space, or the system memory. The memory controller receives the request from the CPU and when the requested data is in the system memory, will access the requested data directly, and when the requested data is in the video memory, will provide a request via its AGP port to the AGP bus. An AGP port associated with the AIC controller receives the request and will access the request of data in the video memory.
When data is requested from the video memory, the requested address must be translated into the appropriate video memory space. If the address containing the requested information is not currently translated in a cache associated with the AIC, the AIC must first request updated translation information from the video memory. Once the requested translation data has been obtained from the video memory, the AIC controller can translate the address received from the memory controller, and make a second request to the video memory for the actual data. Upon receiving the actual data, the data is provided to the memory controller through the AGP bus. The memory controller further routes the data as appropriate.
In order to utilize the AGP bus of the prior art, it is necessary to provide the hardware and software overhead necessary to implement AGP ports on both the memory controller and the AIC controller to support the protocol. In addition, the prior art systems isolate the video memory from the system memory. As a result, increased costs are incurred to support the AGP protocols associated with the interfaces of the two controllers, as well as the requirement for maintaining a separate system in video memory. Therefore, a system and method capable of overcoming these prior art disadvantages would be desirable.